With diversification and high integration of semiconductor devices, techniques for forming finer patterns are being used, and accordingly surface structures of semiconductor devices have become more complicated and step differences between surface films become greater. In manufacturing semiconductor devices, chemical mechanical polishing (CMP) is used as a planarization technique to remove a step of a particular film formed on a substrate. For example, CMP is a process for removing an insulating film excessively formed for interlayer insulation, which is widely used for planarization of an interlayer dielectric (ILD) and an insulating film for shallow trench isolation (STI) which insulates chips from each other and for formation of a metal conductive film, such as wiring, contact plug and via contact.
In CMP, a polishing speed, a planarization degree of a polished surface and an incidence of scratches are important. Such factors are determined depending on CMP conditions, slurry kinds and polishing pad types. In particular, a technique for removing large particles directly related to occurrence of scratches is more critical. When the average diameter of slurry is decreased to reduce scratches, polishing is reduced to decrease production. Thus, slurry having an appropriate size and distribution in view of polishing speed, dispersion stability and scratches is required for CMP. Further, when a small quantity of massive particles and agglomerated particles are present among particles although the particles are densely and uniformly distributed, reducing an occurrence of scratches is limited, and thus thoroughly removing the massive particles and agglomerated particles is preferable. Since even a small quantity of massive particles and agglomerated particles are included in the slurry, even a low number of scratches leads to decreased yields in CMP and subsequent STI. Accordingly a method of removing massive and agglomerated particles is required.